//module ParallelAdder : input A, B, Cin     output ([N-1:0] s), cout
//module controlUnit : input Q, Z, G, reset, clk     output Csignal
//module counter : input load, enable, clk     output reg [N-1:0] out
//module register : input ([N-1:0] in), load, clk, reset    output reg [N-1:0] q
//module shiftreg : input shift, load, ([N-1:0] in), sin,clk, reset   output sout, reg [N-1:0] q
//module zero_detect : input [3:0] a    output zero
//